The VTS Program Committee invites original, unpublished paper submissions for VTS 2019. Proposals for the innovative practices and special sessions tracks are also invited.
Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.
VTS Topics
Analog/Mixed-Signal/RF Test
ATPG & Compression
Silicon Debug
Automotive Test & Safety
Built-In Self-Test (BIST)
Defect & Current Based Test
Defect/Fault Tolerance
Delay & Performance Test
Design for Testability (DFT)
Design Verification/Validation
Embedded System & Board Test
Embedded Test Methods
Emerging Technologies Test
FPGA Test
Fault Modeling and Simulation
Hardware Security
Low-Power IC Test
Microsystems/MEMS/Sensors Test
Memory Test and Repair
On-Line Test & Error Correction
Power/Thermal Issues in Test
System-on-Chip (SOC) Test
Test Standards
Test Economics
Test of Biomedical Devices
Test of High-Speed I/O
Test Quality and Reliability
Test Resource Partitioning
Transients and Soft Errors
2.5D, 3D and SiP Test
New Hot Topics:
This year VTS puts particular emphasis on enlarging its scope soliciting submissions on testing, reliability and security aspects on the following hot topics: approximate computing, neuromorphic computing and quantum computing.